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HT2201
CMOS 1K 2-Wire Serial EEPROM
Features
* Operating voltage: 2.2V~5.5V * Low power consumption - Operation: 5mA max. - Standby: 4mA max. * Internal organization: 1288 * 2-wire serial interface * Write cycle time: 5ms max. * Automatic erase-before-write operation * Write operation with built-in timer * 40-year data retention * 106 erase/write cycles per word * Industrial temperature range (-40C to +85C) * 4-pin SIP, SOT-25 package
General Description
The HT2201 is a 1K-bit serial read/write non-volatile memory device using the CMOS floating gate process. Its 1024 bits of memory are organized into 128 words and each word is 8 bits. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The HT2201 is guaranteed for 1 million erase/write cycles and 40-year data retention.
Block Diagram
Pin Assignment
VCC SDA
SCL SDA
I/O C o n tro l L o g ic X D M e m o ry C o n tro l L o g ic C E
HV Pum p
1 2 3 4 5
4 1 2 3
VCC
SDA
GND
SCL
SCL
GND
NC
EEPROM A rra y Page Buf YDEC
H T2201 4 S IP -A
H T2201 S O T -2 5 -A
A d d re s s C o u n te r VCC VSS
S ense A M P R /W C o n tro l
Pin Description
Pin Name SDA SCL VSS VCC I/O I/O I 3/4 3/4 Serial data inputs/output Serial clock data input Negative power supply, ground Positive power supply Description
Rev. 1.20
1
January 6, 2006
HT2201
Absolute Maximum Ratings
Supply Voltage ..........................VSS-0.3V to VSS+6.0V Input Voltage .............................VSS-0.3V to VCC+0.3V Storage Temperature ............................-50C to 125C Operating Temperature...........................-40C to 85C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol VCC ICC1 ICC2 VIL VIH VOL ILI ILO ISTB1 ISTB2 CIN COUT Parameter Operating Voltage Operating Current Operating Current Input Low Voltage Input High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Standby Current Standby Current Input Capacitance (See Note) Output Capacitance (See Note) Test Conditions VCC 3/4 5V 5V 3/4 3/4 2.4V 5V 5V 5V 2.4V 3/4 3/4 Conditions 3/4 Read at 100kHz Write at 100kHz 3/4 3/4 IOL=2.1mA VIN=0 or VCC VOUT=0 or VCC VIN=0 or VCC VIN=0 or VCC f=1MHz 25C f=1MHz 25C Min. 2.2 3/4 3/4 -1 0.7VCC 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Typ. 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4
Ta=-40C~85C Max. 5.5 2 5 0.3VCC VCC+0.5 0.4 1 1 4 3 6 8 Unit V mA mA V V V mA mA mA mA pF pF
Note: These parameters are periodically sampled but not 100% tested
Rev. 1.20
2
January 6, 2006
HT2201
A.C. Characteristics
Symbol fSK tHIGH tLOW tr tf tHD:STA Parameter Clock Frequency Clock High Time Clock Low Time SDA and SCL Rise Time SDA and SCL Fall Time START Condition Hold Time Note Note After this period the first clock pulse is generated Only relevant for repeated START condition 3/4 3/4 3/4 3/4 Time in which the bus must be free before a new transmission can start Noise suppression time 3/4 Remark 3/4 3/4 3/4 Standard Mode* Min. 3/4 4000 4700 3/4 3/4 4000 Max. 100 3/4 3/4 1000 300 3/4 Ta=-40C~85C VCC=5V10% Min. 3/4 600 1200 3/4 3/4 600 Max. 400 3/4 3/4 300 300 3/4 kHz ns ns ns ns ns Unit
tSU:STA tHD:DAT tSU:DAT tSU:STO tAA
START Condition Setup Time Data Input Hold Time Data Input Setup Time STOP Condition Setup Time Output Valid from Clock
4000 0 200 4000 3/4
3/4 3/4 3/4 3/4 3500
600 0 100 600 3/4
3/4 3/4 3/4 3/4 900
ns ns ns ns ns
tBUF
Bus Free Time
4700
3/4
1200
3/4
ns
tSP tWR
Input Filter Time Constant (SDA and SCL Pins) Write Cycle Time
3/4 3/4
100 5
3/4 3/4
50 5
ns ms
Note: These parameters are periodically sampled but not 100% tested * The standard mode means VCC=2.2V to 5.5V For relative timing, refer to timing diagrams
Rev. 1.20
3
January 6, 2006
HT2201
Functional Description
* Serial clock (SCL)
The next three bits are fixed to zeros. The 8th bit of device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low.
1 0 1 0 0 0 0 R /W
The SCL input is used for positive edge clock data into each EEPROM device and negative edge clock data out of each device.
* Serial data (SDA)
The SDA pin is bidirectional for serial data transfer. The pin is open-drain driven and may be wired-OR with any number of other open-drain or open collector devices. Memory Organization
* HT2201, 1K-bit serial EEPROM
D e v ic e A d d r e s s
Write Operations
* Byte write
Internally organized with 1288-bit words, the HT2201 requires an 8-bit data word address for random word addressing. Device Operations
* Clock and data transition
Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is high. Changes in data line while the clock line is high will be interpreted as a START or STOP condition.
* Start condition
A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. After receiving the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally-timed write cycle to the non-volatile memory. All inputs are disabled during this write cycle and EEPROM will not respond until the write is completed (refer to Byte write timing).
* Acknowledge polling
A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (refer to Start and Stop Definition Timing diagram).
* Stop condition
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (refer to Start and Stop Definition Timing Diagram).
* Acknowledge
To maximise bus throughput, one technique is to allow the master to poll for an acknowledge signal after the start condition and the control byte for a write command have been sent. If the device is still busy implementing its write cycle, then no ACK will be returned. The master can send the next read/write command when the ACK signal has finally been received.
* Read operations
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
D a ta a llo w e d to c h a n g e SDA
The HT2201 supports three read operations, namely, current address read, random address read and sequential read. During read operation execution, the read/write select bit should be set to 1.
S e n d W r ite C o m m a n d
S e n d S to p C o n d itio n to In itia te W r ite C y c le S e n d S ta rt
SCL S ta rt c o n d itio n A d d re s s o r a c k n o w le d g e v a lid NoACK s ta te
S to p c o n d itio n
S e n d C o tr o ll B y te w ith R /W = 0
Device Addressing The HT2201 requires an 8-bit device address word following a start condition to enable the chip for a read or write operation. The device address word consist of a mandatory one, zero sequence for the first four most significant bits (refer to the diagram showing the Device Address). This is common to all the EEPROM device.
(A C K = 0 )? Yes N e x t O p e r a tio n
No
Acknowledge Polling Flow
Rev. 1.20
4
January 6, 2006
HT2201
* Current address read
The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll over during read from the last byte of the last memory page to the first byte of the first page. The address roll over during write from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller should respond a No ACK (High) signal and following stop condition (refer to Current read timing).
* Random read
dition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller should respond with a no ACK signal (high) followed by a stop condition. (refer to Random read timing).
* Sequential read
A random read requires a dummy byte write sequence to load in the data word address which is then clocked in and acknowledged by the EEPROM. The microcontroller must then generate another start conD e v ic e a d d r e s s SDA S W o rd a d d re s s
Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledgment. As long as the EEPROM receives an acknowledgment, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll over and the sequential read continues. The sequential read operation is terminated when the microcontroller responds with a no ACK signal (high) followed by a stop condition.
DATA P
S ta rt
R /W
ACK
ACK
ACK
S to p
Byte Write Timing
D e v ic e a d d r e s s SDA S
DATA
S to p P NoACK
S ta rt
ACK
Current Read Timing
D e v ic e a d d r e s s SDA S
W o rd a d d re s s S
D e v ic e a d d r e s s
DATA
S to p P NoACK
S ta rt
ACK
ACK S ta rt
ACK
Random Read Timing
D e v ic e a d d r e s s SDA S
DATA n
DATA n+1
DATA n+x
S to p P NoACK
S ta rt
ACK
ACK
Sequential Read Timing
Rev. 1.20
5
January 6, 2006
HT2201
Timing Diagrams
tf SCL tS
U
tr tL
OW D
tH
IG H
:S
TA
tH tS
P
:S
TA
tH
D
:D
AT
tS
U
:D
AT
tS
U
:S
TO
SDA SDA OUT
tA
A
tB V a lid V a lid
UF
SCL SDA 8 th b it W o rd n S to p C o n d itio n
ACK tW
R
S ta rt C o n d itio n
Note: The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the valid start condition of sequential command.
Rev. 1.20
6
January 6, 2006
HT2201
Package Information
4-Pin SIP Outline Dimensions
A
B
D C
E F G H
Symbol A B C D E F G H
Dimensions in mil Min. 203 141 543 13 148 48 27 59 Nom. 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Max. 208 146 583 17 152 52 30 63
Rev. 1.20
7
January 6, 2006
HT2201
SOT-25 Outline Dimensions
D
C
L
E
H
e
A2 b A1
A
Symbol A A1 A2 b C D E e H L q
Dimensions in mm Min. 1 3/4 0.7 0.35 0.1 2.7 1.4 3/4 2.6 0.37 1 Nom. 3/4 3/4 3/4 3/4 3/4 3/4 3/4 1.9 3/4 3/4 3/4 Max. 1.3 0.1 0.9 0.5 0.25 3.1 1.8 3/4 3 3/4 9
Rev. 1.20
8
G
January 6, 2006
HT2201
Product Tape and Reel Specifications
Reel Dimensions
T2 D
A
B
C
T1
SOT-25 Symbol A B C D T1 T2 Description Reel Outer Diameter Reel Inner Diameter Spindle Hole Diameter Key Slit Width Space Between Flange Reel Thickness Dimensions in mm 1781 621 130.2 2.50.25 8.4+1.5 11.4+1.5
Rev. 1.20
9
January 6, 2006
HT2201
Carrier Tape Dimensions
P0 D
E F W C
P1
t
B0
D1
P
K0 A0
SOT-25 Symbol W P E F D D1 P0 P1 A0 B0 K0 t C Description Carrier Tape Width Cavity Pitch Perforation Position Cavity to Perforation (Width Direction) Perforation Diameter Cavity Hole Diameter Perforation Pitch Cavity to Perforation (Length Direction) Cavity Length Cavity Width Cavity Depth Carrier Tape Thickness Cover Tape Width Dimensions in mm 80.3 4 1.75 3.50.05 1.5+0.1 1.5+0.1 4 2 3.15 3.2 1.4 0.20.03 5.3
Rev. 1.20
10
January 6, 2006
HT2201
Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc. (Shanghai Sales Office) 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China 200233 Tel: 021-6485-5560 Fax: 021-6485-0313 http://www.holtek.com.cn Holtek Semiconductor Inc. (Shenzhen Sales Office) 43F, SEG Plaza, Shen Nan Zhong Road, Shenzhen, China 518031 Tel: 0755-8346-5589 Fax: 0755-8346-5590 ISDN: 0755-8346-5591 Holtek Semiconductor Inc. (Beijing Sales Office) Suite 1721, Jinyu Tower, A129 West Xuan Wu Men Street, Xicheng District, Beijing, China 100031 Tel: 010-6641-0030, 6641-7751, 6641-7752 Fax: 010-6641-0125 Holmate Semiconductor, Inc. (North America Sales Office) 46712 Fremont Blvd., Fremont, CA 94538 Tel: 510-252-9880 Fax: 510-252-9885 http://www.holmate.com Copyright O 2006 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holteks products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
Rev. 1.20
11
January 6, 2006

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